Photo of adm-xrc-5lx

Product Features

  • Board Format : PMC
  • Host I/F : PCI/PCI-X®
  • Target Device(s) : Xilinx Virtex-5 {LX110, LX155} (FF1153)
  • SDRAM : Up to 2GByte in 4 independent banks of DDRII SDRAM @ 333MHz
  • FLASH : 4MByte serial Flash (connected to user FPGA)
  • FLASH : Configuration Flash providing an initialisation design for automatic loading into the target FPGA.
  • Drivers for Microsoft Windows™, Linux and VxWorks™
  • API with template designs in VHDL and Verilog

Product Summary


The ADM-XRC-5LX is a high performance reconfigurable PMC based on the Xilinx® Virtex-5LX range of Platform FPGAs.

Features include high speed PCI-X® interface, external memory, high density I/O, programmable clocks, temperature monitoring, battery backed encryption (by using an appropriate XRM) and flash boot facilities.

A comprehensive cross platform API with support for Microsoft Windows™, Linux and VxWorks™ provides access to the full functionality of these hardware features.


Xilinx Virtex-5 Family logoPCI-X logo
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Front Panel I/O

XRM Connectors providing 146 discrete I/O

Typical XRM is the XRM-ADC-D2/125

XRM Connectors
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JTAG I/F

Provides the user access to configure the Target FPGA and to run Chipscope on the active design

JTAG Connector
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Board Config

Allows host to configure system clocks, reload the target flash and directly program the target FPGA.

FLASH

Configuration Flash providing an initialisation design for automatic loading into the target FPGA.

Config Switches

Allows host to configure I/O voltage levels.

Config switches
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Local Bus

Local Bus transfer waveform

Links bridge and target FPGAs. 32/64bit wide data transfers, programmable clock rate 10MHz-80MHz, includes Demand mode DMA handshaking.

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PCI Bridge

Alpha Data proprietary firmware is provided for the bridge. It is automatically loaded into the bridge FPGA at power-up.


Provides PCI bus access to/from the host system. Includes multiple DMA engines for fast data transfer.

Bridge Chip
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DMA Engines

Multiple DMA engines allowing fast data transfers to/from the FPGA. Can perform Demand Mode DMA allowing the target to control data transfers.

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Rear I/O

Provides 64 discrete digital I/O.

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Target FPGA

Application/Target FPGA.

Target Device(s)

family : Virtex-5

footprint : FF1153

devices : LX110, LX155

Target Chip
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FLASH

Configuration Flash providing an initialisation design for automatic loading into the target FPGA.

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DDR-II SDRAM

Up to 2GByte in 4 independent banks of DDRII SDRAM @ 333MHz




Product

ADM-XRC-5LX

Board Format

PMC

Type

FPGA Board

Host Interface

PCI/PCI-X®

Functional Summary

The ADM-XRC-5LX is a high performance reconfigurable PMC based on the Xilinx® Virtex-5LX range of Platform FPGAs.

Functional Description

Features include high speed PCI-X® interface, external memory, high density I/O, programmable clocks, temperature monitoring, battery backed encryption (by using an appropriate XRM) and flash boot facilities.

A comprehensive cross platform API with support for Microsoft Windows™, Linux and VxWorks™ provides access to the full functionality of these hardware features.

Target Device(s)

family : Virtex-5

footprint : FF1153

devices : LX110, LX155

Host Interface

64-bit 66MHz PCI or 64-bit 133MHz PCI-X® interface in separate bridge device with 64-bit 80MHz local bus

4 DMA controllers

FIFO and interrupt controller.

XRMs Compatible with ADM-XRC-5LX

XRM-ADC-D2/125, XRM-ADC-D3/1G5, XRM-ADC-D6/250, XRM-ADC-S4/3G, XRM-CAMERALINK, XRM-CLINK-ADV, XRM-CLINK-GIGE, XRM-DAC-D3/275, XRM-DAC-D4/1G, XRM-HD-SDI, XRM-IO146, XRM-IO34, XRM-VIDEO-IO, XRM-ZBT

Carriers Compatible with ADM-XRC-5LX

ADC-cPCI, ADC-EMC, ADC-PMC, ADC-VXS

On board memory

SDRAM :

Up to 2GByte in 4 independent banks of DDRII SDRAM @ 333MHz


FLASH :

4MByte serial Flash (connected to user FPGA)


FLASH :

Configuration Flash providing an initialisation design for automatic loading into the target FPGA.


Software

Drivers for Microsoft Windows™, Linux and VxWorks™

API with template designs in VHDL and Verilog

Front Connector I/O

Up to 146 LVTTL/LVDS I/O

Programmable signaling levels of 1.8V, 2.5V or 3.3V

Rear Connector IO

64 I/O connections via PMC pn4 connector

Board Configuration

Clocks :

Local bus programmable up to 100MHz

Low-jitter user clock, programmable up to 640MHz

Custom clock inputs available through XRM interface


FPGA :

PCI Bus direct to SelectMAP port

From Flash direct on power-up

Via external JTAG connector


Environmental Specification

Temperature :

Air cooled option

Operating Temperature 0° to +55°C

Non-Operating(Storage) Temperature -40° to +85°C

Operating Humidity 5% to 95% at 40°C non-condensing

Non-Operating(Storage) Humidity 5% to 95% at 40°C non-condensing


EMC :

FCC 47CFR Part 2

EN55022 Equipment Class B


Further Environmental Information can be found by reading:
The Alpha Data PMC Environmental Specification


Product code

ADM-XRC-5LX/z-y(m)

Virtex-5 Device

z

LX110, LX155

Virtex-5 Speed

y

1, 2, 3

Memory Size Fitted

m

/1 = 1GBit,

/2 = 2GBit


Sample Code :

ADM-XRC-5LX/LX110-1/1

Order Code generation

Go to Order Code Generation Page which allows the generation of specific order codes. The numbers created on this page are for illustration purposes, please contact Alpha Data for more information.


Sales Questions

For any sales questions regarding the ADM-XRC-5LX, please e-mail us at:

sales@alpha-data.com


Technical Support

For any technical questions regarding Alpha-Data products please e-mail us at:

support@alpha-data.com